We use an AD9558 and have two different differential reference clocks and none of it is accepted as a valid clock. What could possibly be wrong?
REFC is 10 MHz, dc-coupled, with 100 Ohm termination on the AD9558 side, directly driven by an LVDS clock buffer.
REFD is 125 MHz, ac-coupled, with 100 Ohm termination on the AD9558 side, driven by an FPGA (LVDS).
Both LVDS references (C and D) look fine on an oscilloscope.
REFA and REFB are driven by LVCMOS sources and are accepted as valid clocks. The PLL configuration was generated using Analog's AD9558 Evaluation Software.
Thank you in advance.