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AD9364 RX/TX path delays

Question asked by abadobid on May 19, 2017
Latest reply on Sep 8, 2017 by sripad

I am using no-os driver to configure an AD9364.

 

I have set the RX and TX sample rates to 60MHz.  This results in the following clock chain:

ad9361_set_trx_clock_chain: 960000000 480000000 240000000 120000000 60000000 60000000
ad9361_set_trx_clock_chain: 960000000 240000000 120000000 60000000 60000000 60000000

 

Both rx and tx FIR are disabled.

 

Looking at the AD9364 users guide "DIGITAL Rx BLOCK DELAY" it looks like I should be seeing a delay contribution from the digital filters of approx:

                  HB3           HB2           HB1    

RX path (2/240M) + (2/120M) + (7/60M) = 8.3ns + 16.6ns + 116ns = 140ns

TX path (2/120M) + (2/60M)  + 0             = 16.6ns + 33.8ns             =  50.4ns

 

= 190.4ns total delay for digital filters

 

I am using an ILA in Vivado to capture the TX and RX data just before clocking in/out to the AD9364.  I am seeing a delay of approx. 800ns.

 

I know that the 190ns is only the digital filter delay.  Is there a description somewhere of what the source migth be for the additional ~600ns delay I am measuring

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