I'm working on generating FMCW sawtooth signal with DDS-PLL structure.
After gererating 45~57.5 MHz FMCW signal with AD9854, I want to synthesize 720~920 MHz FMCW signal with integer-16 PLL.
(cf 1. Period of the FMCW is under 500 us.
cf 2. the external reference of the AD9854 is 300 MHz(maximum) signal for high resolution, minimum step time is 1/300MHz ~ 3.33 ns.)
However, when I investigate PLL chips, most chips use 'BAND SELECTION' method for tuning VCO. Also, 'band select process' time is around tens of micro-seconds.
Therefore, I think the FMCW signal CANNOT be generated CONTINUOUSLY.
Is there any PLL chip that meets above application ?