I'm attempting configure and access the DDR3 on the SC589 ez-kit using the ARM core and I am having some difficulty. I started by taking the code from Core1 of the 'DDR3_Init' project in EE-387 and copying it into a new project that ran purely on Core0. When I run the project, the ARM dies at the beginning of the CGU_Init function when it checks the value of the CGU0_STAT register due to a 'data abort exception' (A quick google search says this means there was an invalid data access). What's going on here? Is the ARM not supposed to access this register? The original 'DDR3_Init' project has no issues running from Core1. I've attached my project, and I would greatly appreciate it if someone could point in me in the right direction.