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AD5668 Implementation Difficulties

Question asked by neltnerb on Oct 3, 2011
Latest reply on Oct 25, 2011 by Padraic

Dear Forum,

 

I am attempting to use the AD5668 16-bit 8-channel DAC in a new design, and am having a hard time interfacing with the chip.

 

First of all, I had a bit of confusion initially and used the 14-pin package when it is not available in a 2.5Vref 16-bit version. However, the 16-pin package appears to be possible to use based on the datasheet by tilting the part a bit, soldering, and then taking the two unsoldered pins (LDAC and CLR) and tying LDAC permanently to GND with CLR tied permanently to +5VDC. I have attached a photograph of my modifications -- not the prettiest thing either, but the solder joints are clean, and the electrical connections seem to be fine.

 

Next, I am trying to operate this device, but am unable to get any kind of a response from the outputs or the voltage reference output. The way that I am doing this is by the following steps.

 

1. Set AD5668 SYNC.
2. Delay of several microseconds minimum.
3. Clear AD5668 SYNC.
4. Delay for 1 microsecond.
5. Send over SPI, 00000100,11111111,11111111,11111111 in order to turn on internal voltage reference.
6. Delay for 1 microsecond.
7. Set AD5668 SYNC.

 

However, this action does not seem to actually turn on the voltage reference. Or at least, the voltage output on the 100nF stabilizing capacitor is under 10mV when probed.

 

Next, in attempting to set an output value, the following steps take place. In this example, setting channel 0 to FFFF.

 

1. Clear AD5668 SYNC.
2. Delay for 1 microsecond.
3. Send 00000011,00001111,11111111,11110000
4. Delay for 1 microsecond.
5. Set AD5668 SYNC.

 

As far as I can tell this is the correct way to use the chip, but I am getting nothing. The SPI communication works with other chips, and I am confident that I am using CS lines properly to avoid bus contention. I also tried slowing down the data rate in case noise was a problem, but this did not change the behavior.

 

Based on page 9 of the datasheet, I think that the chip should work fine with LDAC pulled permanently low and with CLR pulled permanently high. But if I'm wrong on this, please let me know -- that one at least is a fairly easy fix.

 

Or if I'm misunderstanding what packets I should be sending, that would also be great to know.

 

Best,
Brian Neltner

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