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ADN8831 linear side power loss

Question asked by C-Humpoletz on May 2, 2017
Latest reply on May 4, 2017 by ytu

I am hoping to use the ADN8831 to drive a 1.0V, 3.5A TEC from a 5.0V power supply. I bought the evaluation board and am using it to develop the design.

 

I have adjusted the evaluation board so that it regulates the thermistor temperature without oscillating. I believe it is working as intended. However, under certain conditions the power dissipated in the linear-side MOSFETs (Q1 on the evaluation board) is far in excess of the values expected from the datasheet. To quantify this I have used the equations on page 17 of the Rev.A datasheet, relating VLFB and VSFB to VOUT2, to calculate the expected power loss in Q1 and compared it to measured values (see attached spreadsheet). The results appear to show an offset in the linear portion of the VLFB-VOUT2 graph, which increases the voltage drop across Q1 (hence increasing its power dissipation) when cooling.

In this instance, peak power loss in Q1 is just over 2 watts - equalling the maximum power allowed for the Q1 device in its datasheet.

 

My questions are:

  • Is this offset within the scope of normal device-to-device variations for the ADN8831?
  • If so, how much worse can it get? I.e. how much power loss must I allow for in Q1?
  • If not, what is causing the problem?
  • Can the output stage be re-biassed to reduce or eliminate the offset?
  • Do you have any other suggestions?

 

Thank you for your help.

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