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Multi-core (Shared memory)

Question asked by RCP on May 2, 2017
Latest reply on May 11, 2017 by daveG

Hi,

 

     I am using ADSP-SC589 is a multi- core architecture chip, here I'm trying to establish the process synchronization from the ARM core to SHARC core's by using of shared memory spaces ( DDR memory space and MMR spaces) , In these memory locations i can able to read the updated values from the SHARC to ARM.

    I tried to write some values into shared memory using ARM its throwing FATAL ERROR, only read is possible.

    There is any specific memory space is available for the ARM and SHARC to perform read/write.

    Please help to find out the common memory space, or some other way to use the shared memory space effectively.

 

 

 

 

Thanks & Regards,

Praveen

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