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Below mentioned sequence written for frequency setting registers. Is this correct or not. If not please tell me the correct sequence

Question asked by dhanvi on May 2, 2017
Latest reply on May 4, 2017 by Vinod

AD9361 Frequency Setting Registers

ad9361_ensm_enable(0x013,0x00); //for TDD Mode
ad9361_ensm_enable(0x014,0x00);

ad9361_ensm_enable(0x014,0x11);
ad9361_ensm_enable(0x015,0x15);
ad9361_ensm_enable(0x017,0x15);

ad9361_disable_VCO_calibration(0x55); //Register-- 0x270

ad9361_tx_rx_enable(); //Register-- 0x002, value--0x04
ad9361_select_TX_RX_channel(0x04,0x00); //Register-- 0x004, value--0x00
ad9361_ref_clock(); //Register-- 0x045, value--0x03
ad9361_clock_enable(); //Register-- 0x009, value--0x03
ad9361_BBPLL_enable(); //Register-- 0x00A, Value--0x31
ad9361_fre_para()
{
SPI_Write 0x3F,0x40;
SPI_Write 0x40,0x00;
SPI_Write 0x43,0x00;
SPI_Write 0x42,0x00;
SPI_Write 0x41,0x00;
SPI_Write 0x44,0x28;
SPI_Write 0x45,0x03;
SPI_Write 0x46,0x04;
SPI_Write 0x47,0x00;
SPI_Write 0x48,0xC5;
SPI_Write 0x49,0x5B;
SPI_Write 0x4A,0x35;
SPI_Write 0x4B,0xE0;
SPI_Write 0x4C,0x86;
SPI_Write 0x4D,0x05;
SPI_Write 0x4E,0x10;

}
ad9361_set_tx_atten(ATTEN0_TX1_REG,10000); //Register--0x073, Value--10000

ad9361_vco_input(6,80); //Register--0x231, value--6Ghz/80MHz
ad9361_rfpll_divider(0x30); //Register--0x005 , value--0x30
ad9361_DCXO_nominal_word(0x00); //Register--0x292 , value--0x00
ad9361_set_calibration()
{
ad9361_calibration_control(0x05E,0x80); //BBPLL Locked
ad9361_calibration_control(0x016,0x52); //TX Analog filter Tune
}
ad9361_set_RF_SYNTH_calibration()
{
SPI_Write 0x284,0x80;
SPI_Write 0x287,0x00;
}

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