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simple DMA array descriptor example

Question asked by verysmallbits on Apr 28, 2017
Latest reply on May 24, 2017 by Jithul_Janardhanan



I have a single STOP DMA to the EPPI working just fine but when i try to use an array descriptor operation with exactly one entry it doesn't work.

So obviously there's something about setting up the array description that causing a problem.

The documenation is very unclear on how the array process works.


1 Does each descriptor in an array, except the last one, have to be set up as a FLOW=DSCARRAY and have NDSIZE set properly ? I would assume so - -but I haven't found it to help.

2 does each descriptor config need to have the enable bit set ?


here's the code, it is only the code for the DMA setup.  Other code further down the line enables the DMA and the PPI.

Again, I'd like to stress that the single, register based, DMA set-up works just fine.


Thank you



    //volatile uint32_t *pREG_DSCPTR_NXT = pREG_DMA14_DSCPTR_NXT;
    volatile uint32_t *pREG_ADDRSTART = (volatile uint32_t *)pREG_DMA14_ADDRSTART;
    volatile uint32_t *pREG_CFG = pREG_DMA14_CFG;
    uint32_t *pDescr;
    uint32_t dma_xcnt = DMA_BUF_N;
    uint32_t dma_xmod = 0x4;
    uint32_t dma_ycnt = 0x0;
    uint32_t dma_ymod = 0x0;
    uint32_t cfg = 0x0;
    uint32_t i;


    // set up the configuration for each work unit


    // EPPI transfers are 4 bytes
    cfg |= ENUM_DMA_CFG_MSIZE04;
    cfg |= ENUM_DMA_CFG_PSIZE04;


    // trig when X count reaches 0


// single unit - just set the FLOW to STOP

    cfg |= ENUM_DMA_CFG_STOP;

    // cfg |= ENUM_DMA_CFG_DSCARRAY;

   // cfg |= ENUM_DMA_CFG_FETCH06;


    // does the enable bit needs to be set in the descriptor ?

    // cfg |= ENUM_DMA_CFG_EN;


    // see table 19-14 of the blackfin hardware manual
    pDescr = &dma_descriptors[0];
    // that's one ugly typecast
    pDescr[0] = (uint32_t)(&dma_buffer[0]);
    pDescr[1] = cfg;
    pDescr[2] = dma_xcnt;
    pDescr[3] = dma_xmod;
    pDescr[4] = dma_ycnt;
    pDescr[5] = dma_ymod;


    *pREG_DMA14_DSCPTR_CUR = &dma_descriptors[0];


    cfg = 0x0;
    cfg |= ENUM_DMA_CFG_MSIZE04;
    cfg |= ENUM_DMA_CFG_PSIZE04;

    cfg |= ENUM_DMA_CFG_FETCH06;


    // set up the flow as a descriptor array- because that's what it is


     *pREG_DMA14_CFG = cfg;

    return cfg;