Dear sir !
I'm working with the evaluation board AD-FMCOMMS5-EBZ controlled by the carrier Altera Arria 10 Soc Dev Kit.
I plan to use No-OS drivers.
Can you help me with driver software example for Altera platform ?
I don't think software is your problem, but here it is (for Xilinx, you need to port it to Altera).
no-OS/ad9361 at master · analogdevicesinc/no-OS · GitHub
Did you manage to generate a sof for fmcomms5 on the A10 SOC board?
Thanks for reply ! Yes, i generated a sof for fmcomms5 on the A10 Soc board. I downloaded the no-os example driver and did the right things for Altera platform. But I still have the following error:
ad9361_reset: by GPIO
ad9361_init : Unsupported PRODUCT_ID 0x80ad9361_init : AD936x initialization error
I tried to initialize an ad9361 (connect with FMC port A) to test the effect by the following:
assign spi_ena_a = 1'b1;
assign spi_ena_b = 1'b0;
I still wonder what is the voltage of the spi pins is 1.8V, the current is 12mA . Is it too small ? because the common bus spi for both ad9361 and ad5355 ?
Here is my top file and my error. Help me solve this problem please !
I am a little worried now. Is this the board you are using?
Arria 10 SoC Development Kit
If you can, will you share the fmcomms5 pin mappings on the FMC-A you used?
As for your question, I am not sure how you are accessing the SPI.
What is all this spi_ena_a and spi_ena_b things?
Are you using the HPS SPI or Avalon SPI?
What do you see on the SPI lines?
I am trying to generate sof for fmcomms5 on A10 soc board, but i am not able to place " rx_clk_in " on G14 pin.
Please help me to resolve this issue.
Thanks and Regards,
Yes, I am using Arria 10 SoC Development Kit . I am using Avalon SPI, using Nios II to drive both ad9361.
I think the two pins spi_ena_a and spi_ena_b are used to allow connections to ad9361 (connect to FMC-A) and ad9361 (connect to FMC-B).
Here are fmcomms5 pin mapping on the FMC-A and FMC-B, and ad-fmcomms5-ebz , a10_soc_devkit schematic:
Please explain to me if I misunderstand about pins spi_ena_a and spi_ena_b.
Sorry, I can't look into all these files. If you have studied our designs, you should be able to pin point your issues to a particular line or paragraph for us to look at. I don't think you are using our reference design -- are you? You are probably just playing around with the SPI lines now, and not even looking at the data lines. And most likely keeping CSN lines asserted low all the time. In a general sense, I suggest you simulate your design by writing a small AD9361 digital interface yourself. This is the best method to study and understand it.
Thanks for your suggestion ! I am trying to use SPI lines to initialize both ad9361, then I'm looking at the data lines.
Hi adepu ! you need to connect rx_clk_in to global clock block "altclkctrl"
If you want to connect card FMCOMMS5 to A10. You need drive pin "reset_b of FMC post B" from max V. It means, you need remember this pin, if not the AD9361 is not successful inited.
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