AnsweredAssumed Answered

ADV7623 - TMDS PLL Lock Reset

Question asked by SS963 on Apr 27, 2017
Latest reply on May 19, 2017 by SS963

Hi, we've a custom board designed with ADV7623 and custom software running on this board. Register settings match to recommended settings manual for ADV7623. Its working fine but sometimes when I switch from one HDMI source to another then all TMDSPLL_LCK_X_RAW (IO MAP - 0x6A) go down. Then in a second TMDSPLL_LCK_X_RAW goes high again.

In hardware reference manual on page# 210 it state:

"A loss of TMDS clock or 5 V signal on the HDMI port selected via HDMI_PORT_SELECT resets the entire HDMI section except for the EDID/Repeater controller and the audio section.
The loss of a 5 V signal condition is discarded if DIS_CABLE_DET_RST is set high"

 

As a first step I want to confirm that is this problem related to above statement?

Then how can I avoid this or at least detect that its a genuine disconnect and not HDMI reset!

 

Thanks

 

P.S. I'm new to this forum and I think Video group is proper place for such question but if its not then move it to proper place please

Outcomes