AnsweredAssumed Answered

unusual 480p-60 format 

Question asked by Gunit on Apr 23, 2017
Latest reply on Apr 26, 2017 by Gunit

Hello evreyone 

For couple of days i'm struggling showing up image with ADV7513
FPGA is outputing an unregular format (from what i've seen so far from reference design):

480p-60 

2x clk (not ddr)

YCbCr 422

8bit

style 1.

 

 

EDID block:

ACTIVE_V = 480

FRONT_P_V = 9

V_SYNC = 6 (IDLE = "HIGH")

BACK_P_V = 30

 

ACTIVE_H = 720

FRONT_P_H = 16

H_SYNC = 62 (IDLE = "HIGH")

BACK_P_H = 60

 

PIXCLK = 54Mhz 

*DE signal to be generated from ADV7513

 

Can anyone suggest "must" register set for this format?

 

Thanks

Gil

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