(PicoZed SDR 2x2 + breakout carrier, rev C)
We have a custom RF frontend connected to breakout GPIOs. GPIOs control power amplifier, LNA and switch. We need all those signals to be 0 V initially, but as the image below shows when the PicoZed is turned on the output voltage is 3.3V until the FPGA is eventually programmed after ~1.5 seconds.
Is there any way to force those pins to be always 0 volts when the bitstream hasn't been loaded yet?