The audio_input_ports_sel control should be set to 1 so the AP1_IN and AP2_IN ports are used for the audio. It should only be set to 0 if you are using the pixel input port on ADV7625 and want audio as well. In which case there are two separate audio input ports called AUD1_IN and AUD2_IN. Section 5.3 of the hardware manual describes this.
Or scripts include this write :
B0 0F 0C ; default=0x08, Audio Input Ports Config - Use AP1_IN and AP2_IN ports as the Audio Input Ports
To offer any further suggestions to you, we'd need to better understand the audio configuration in your system:
i.e. you would need to explain :
Do you have one of our evaluation boards for ADV7625?
How do you configure the board either through script or through software driver?
Did you visit ADV7625 Design Support Files for configuration scripts, documents, schematics etc?
Hi Jeyasudha.M,Yes, I have. And I reference and cited them as much as possible.However, not so much as a reference with respect to audio.Please continue to investigate.Best regards,
Hi all,Please show me the technical advice.I can send register dump, if necessary.Best regards,
Sorry for the delay and the expert on this part is out of office and will look in to this later this week.
Please refer the Audio I/O Overview Figure (Figure 15) in the Hardware Manual that may be a useful reference for the explanation below.
Setting the APx_OUT_SOURCE_SEL mux to 0x5 or 0x6 is selecting an audio input port (AP1_IN or AP2_IN) as the audio source for that audio output port (APx_OUT = AP1_OUT or AP2_OUT).
In this configuration, the content on the APx_IN pins is being muxed back out on the APx_OUT port and as such, the mclk_fs_n[2:0] control has no effect.
The MCLK signal on APx_IN would instead need to be adjusted at the source of APx_IN.
For APx_OUT=APx_IN port selections, the mclk_fs_n[2:0] control could only really have an effect if the source of the APx_IN audio was the other Audio Output port.
o For an RX1 selection, mclk_fs_n[2:0] in DPLL A map would be used
o For an RX2 selection, mclk_fs_n[2:0] in DPLL B map would be used
Thank you for answer.
Please find our expert comments below
When APx_OUT = APx_IN there is no control to adjust MCLK_OUT on APx_OUT – the input is just being muxed back on the output.
Instead, you would have to adjust the MCLK at the source of the signal you are applying to that APx_IN port.
The only scenario where the MCLK_OUT could be adjusted by ADV7625 is if the source of APx_IN was coming from the other APx_OUT as we described in our example above.
Does it mean that should run it on an external device?
If you have APx_OUT_SOURCE_SEL set to 0x5 or 0x6, then the only way to adjust the MCLK out signal would be at the source of your APx_IN_MCLK signal (assuming your source allows for that), because in this configuration, (i.e. when 0x5 or 0x6 values are used), what is being output on the APx_OUT_MCLK pin is whatever is being input on the APx_IN_MCLK pin.
The APx_IN audio ports are generally used to insert audio into the HDMI Tx output. On ADV7625, the HDMI Tx outputs can source their audio from either the HDMI Rxs or from the Audio Input ports. The txa_audio_source_sel and txb_audio_source_sel controls are used to configure the audio on the Tx outputs.
The APx_OUT Audio Ports are generally used to output audio that has been extracted from the HDMI Rx. The APx_OUT ports can also / instead be used to output the audio that is on the APx_IN ports, (or the ARC receivers in the HDMI Txs).
So there are several options for muxing the audio in and out of the ADV7625. You don't have to use an external source for the audio but the part supports that if required.
I confirmed that APx_OUT_MCLK output 512fs same as APx_IN_MCLK when AUDIO_INPUT_PORTS_SEL set to 1 and APx_OUT_SOURCE_SEL set to 0x5 or 0x6.Also, APx_OUT_MCLK output 64fs when AUDIO_INPUT_PORTS_SEL set to 0.But I can't set AUDIO_INPUT_PORTS_SEL on the current PCB.Do you have any ideas?
I'll chage the PCB replace AUDx_IN with APx_IN.Thank you so much.
If you are only interested in stereo audio, and only need to output that audio on the HDMI Tx, then your existing design may possibly be able to support that using the AUD1_IN and AUD2_IN ports instead. It may be worth experimenting with this. I'd also suggest carefully reviewing the Hardware Manual Section 2.4 and Section 5.3 again before modifying your design to ensure your requirements can be met.
Each AUDx_IN port comprises of three pins (where AUDx_IN = either AUDIN or AUD2_IN):
To use the AUDx_IN ports instead of the APx_IN ports (where APx_IN = AP1_IN or AP2_IN)you need to include this write :
B0 0F 08 ; default=0x08, Audio Input Ports Config - Use AUD1_IN and AUD2_IN ports as the Audio Input Ports
As you can see above, there is no MCLK pin on the AUDx_IN port, but I do see these Tx settings in the ADV7625-26-27 Ver 1.0 scripts :
:06-39 TxA Use Internal MCLK & Disable SPDIF receiver for AUD1_AUD2 port:B8 0B 0E ; default 0x0E, Disable SPDIF receiver and use Internal MCLK End :06-40 TxA Use Internal MCLK & Enable SPDIF receiver for AUD1_AUD2 port: B8 0B 8E ; default 0x0E, Enable SPDIF receiver and use Internal MCLK End
We've only used the AUDx_IN ports when the Pixel Input Port is in use. So we haven't evaluated this with HDMI input and you would need to carefully evaluate this yourself.
Finally, one last point on the mclk_fs_n[2:0] control. Regardless of whether your audio port is APx_In or AUDx_IN, if you are setting APx_OUT = APx_IN (APx_OUT_SOURCE_SEL set to 0x5 or 0x6), the mclk_fs_n control will have no effect. As we explained in the earlier posts, for that particular configuration, there is no way to adjust the APx_OUT_MCLK. It would instead have to be adjusted back at the source of your APx_IN signal. The only possible scenario I can think of where you could possible adjust the MCLK for that configuration, would be example we described back in the earlier post : https://ez.analog.com/thread/94436#comment-300836
Thank you very much for your kind and polite answer.MCLK_OUT was output as expected on the new PCB accorded to your advice, and confirmed the Hi-Fi audio output.
Thank you again.
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