Is it possible to wake up the AD9914 from sleep (power down) mode and get an output signal in less than 10uSec ?
If yes, in which mode, and what configuration.
The data sheet specifies "Time Required to Leave Power-Down" in the specifications table under the heading DIGITAL TIMING SPECIFICATIONS. The typical spec shown would meet your needs easily, BUT when you come out of power down, you need to recal the DAC, which will take much longer than the 10 usec you are seeking.
If you only power down the digital section, you might be able to bring the device back up and performing well without performing a re-calibration, but you should experiment with this first. Proper calibration of the DAC core is critical to achieve reasonable performance.
I've read the paragraph in DS, and there isn't any mention of minimal time to recall the PLL, only the max time...
As for powering down only the digital section, this is very interesting and need of course validation.
It would mean not using the power down pin, and powering down an LDO or DC/DC.
Note: The digital section can be powered down using via a bit in the register map.
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