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AD9361 test

Question asked by huangbin on Apr 19, 2017
Latest reply on May 4, 2017 by Vinod

Hi! AD9361 initial success, dual port,ddr,cmos,and reg 0x017 = 1A.the DATA_CLK signal is right,but the RX_FRAME signal is always low. please help me figure out the possible reason.Thank you!

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