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AD9361 CMOS interface mode

Question asked by cryptococa on Apr 18, 2017
Latest reply on Apr 18, 2017 by rejeesh
Branched from an earlier discussion

I am using what is current in the repository today.

 

Is it expected that adc_pn1_data_pn in rx_pnmon for each ADC channel is changing twice as fast as the dac_pn_seq signal in tx_channel? The interesting thing is that if I instrument dac_valid and adc_valid, I see that dac_valid is asserted half as many times as adc_valid, and everything other adc_valid has adc_data set to almost all 0s.

 

The interesting in thing is that RX auto calibration works. Also, I see adc_data is a delayed version of dac_data - -with the note that adc_valid asserts twice as often as dac_valid.

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