I create my design by XPS 14.4
I create two design with the same IP core
But one get initialize error (digital tunung fail)
I have already check the timing, and I found that the fail one 's rx_clk routed strange
it's rx_clk connect sometimes is logic = 2 and sometime is logic = 3
But the other one is always logic = 2 ( IBUFGDS--> BUFG)
I'm so much convinced that the errors concern to the synthesis.
Below is the success case
Below is the fail one. And we can see it synthesis much more things
Need somebody give me some answers
I have check many setting but can't find the different part.