I'm trying init the AD9957 using an FPGA. So far I've been unsuccessful. I believe
the timing of my SPI inerface is correct, but I'm not sure that I'm doing everything
that needs to be done to generate a single tone.
Attached is the timing diagram from my design.
During ad9957_rst the SPI bus sends out a read instruction. I don't look at the SDO
line, I just have it issuing a read to make sure that I don't write to a register accidently.
After reset I issue a write to Register 0x14 which I think is a 64 bit register. The next
4 bytes are each 0x00 which covers the scale factor and phase offset word. The next 4
bytes are each 0x33 which is a frequency tuning word.
After that I assert PS1 so that PS is now 110 which I believe is a Single Tone profile.
Asserting one of the PS lines should generate an internal IO_Update which should
initializae the device.
I also assert spi*_cs and kill spi*_sck to prevent any additional writes from occurring.
Is this an appropriate way to generate a tone with the AD9957?
Things I've checked:
The board works with the evaluation software
The signal levels look clean