The ADM2587E datasheet mentions Open- and short-circuit, fail-safe receiver inputs.What does this mean, and what does the term bus idle failsafe mean?
Is bus idle fail safe available in the ADM2587E?
The ADM2587E is designed so that the receiver output will be a logic High if the receiver inputs are open circuit or shorted. Additionally the receiver is designed to output a logic High if the bus is idle.
In each of these conditions, the voltage differential between receiver inputs A and B (Va - Vb) may be close to 0V. The RS-485 specification does not specify the receiver output value when the differential input is between 200 mV and -200 mV, so without the failsafe features of the ADM2587E, the receiver output would normally be undefined for this region.
Bus idle failsafe means that the receiver is designed so that a differential greater than -30 mV will still provide a receiver output High. The receiver output remains undefined for an input differential between -30 mV and -200 mV. This is shown in the truth table in page 14 of the ADM2587E datasheet, where a short explanation is also given. Application Note AN-960: RS-485/RS-422 Circuit Implementation Guide also explains on page 6 and 7 about bus idle failsafe and failsafe receivers.
A minimum differential between bus lines A and B can also be set-up by a network of external biasing resistors. Adding a pull-up resistor on A to Power and a pull-down resistor on B to Gnd can ensure that when no driver is active on the bus, Vb is still 200 mV or more greater than Vb.
Application Note AN-960: RS-485/RS-422 Circuit Implementation Guide explains on page 6 how to calculate the bias resistor values.
The open- and short-circuit failsafe features are also present on the ADM2582E, ADM2682E/87E and most other isolated RS-485 transceivers (refer to the product table for details) as well as the ADM307xE and ADM485x families of standalone transceivers. Open circuit failsafe is present on all Analog Devices RS-485 transceivers.
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