I am migrating my FPGA design using the ZC706 from the AD9361 (FMCOMMS3) to the AD9371. For DMA, we are currently using the Xilinx AXI DMA core for the AD9361. I see that the AD9371 using an ADI AXI DMA controller that has a 64-bit data bus connecting to the AD9371 RX samples. Was the Xilinx AXI DMA core not usable at high sample rates since the AXI streaming data bus width was only 32-bits? I am asking this question in order to figure out which DMA core to use when the sample rate is set to 245.76 MSPS (TX) and 122.88 MSPS (RX).
Thanks for your help!