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AD9824 CCD-Mode

Question asked by ccd_ing on Apr 10, 2017
Latest reply on May 1, 2017 by EBarnes

Hi, I have a problem with AD9824. 

Please help me to understand how it works in CCD mode.  I have monochrome CCD. 

At first I want to run CCD processor in ccd mode with no clamping using Figure 5 as shown in datasheet.

I have initialized AD9824 registers as follow:

Operation register: value = A0h;

VGA Gain register: value = 5Fh;

Clamp Level register: value = 00h;

Control Register: value =00h;

all PxGA registers: value = 3Fh;

 

PBLK set HIGH. But I have all zero at the ADC outputs. 

I tried set Clamp Level register value = 08h. In this case I have constant output value 8000 dec with high average value=700. 

Output value no depend on input signal variation.

 

Help me initialize AD9824 registers!

 

In datasheet (Figure 33 Recommended Circuit Configuration for CCD mode) shown that AUX1IN connected directly to VSS and AUX2IN directly to 3V, is it right connection of this inputs?

 

I have detected mistake at the Table I in datasheet. The first data bits row is shifted!!! DATASHEET 2002 REV.0

 

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