The AD9129 Controller Clock Divider bits are defined on Data CTRL1 register 0x0B. We have always set this register to be DCI/512 because of the example set up in the data sheet but we don't really know what it does. I suspect it sets a divider for the DCI clock that is then used to operate the DLL but the data sheet does not actually say that. Are there any advantages to setting this register differently? Why does it need to be set at DCI/512?