I am having trouble streaming data to the DAC using this reference design. I can output a sine wave fine but it appears as if the DDR is too slow.
The DDR4 runs at 2.4Gbps. My DAC sample rate is 256Msps with two DACs. The total data rate is 1.024GBps. I am currently loading the data into DDR4 from the PCIe bus and then using the AD9144 DMA to transfer this data to the AD9144 FIFO but due to the slow read speed of the DDR4, the data is output incorrectly.
Was this reference design designed to stream data to the DAC or was this more of a proof of concept that the DAC could output a sine wave. If this reference design can stream data, how do you get around using the DDR4?