In the AD9361, is there a way that the RX2 input would be getting inverted with respect to the RX1 input? The signals that I read from these two inputs seem to always be 180 degrees out of phase regardless of frequency. I can set the rx1rx2_phase_inversion_en bit and bring them in phase but it's not clear to me why they should be inverted in the first place. The rx1rx2_phase_inversion_en bit is defined as bit 5 in the REG_PARALLEL_PORT_CONF_2 (address 0x011) register according to the ad9361 driver source code. This bit is not described in the AD9361 Register Map Reference Manual other than to state that it should be set to zero.