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AD5932 SPI polarity and phase

Question asked by samuel.fmlourenco on Mar 29, 2017
Latest reply on Mar 31, 2017 by samuel.fmlourenco

Hi,

 

I've read the AD5932 datasheet and found it to be doubtful regarding the SPI parameters to be used, especially regarding polarity. On page, it states that "SCK idles high between write operations (CPOL = 0)". However, from several sources I read that CPOL = 0 means that the clock is active high, and therefore should idle low. My question is, after all, the clock is active high or active low? Also, regarding the phase, it is trailing edge triggered (CPHA = 1)?

 

Kind regards, Samuel Lourenço

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