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AD9874 - SSI synchronization of multiply devices

Question asked by IRu on Mar 29, 2017
Latest reply on Apr 3, 2017 by PMH

Dear all,

Im going to use multiply AD9874s configuration (according to datasheet Rev. A,  Figure 28 'Example of Synchronizing Multiply AD9874s'). I'd like to reduce number of SSI lines connected to DSP/FPGA. Both converter will be synchronized by means of SYNCB signal.

Is it correct to use only four lines FS (Master), CLKOUT (Master), DOUTA (Master), DOUTA (Slave) to capture digital streams from both Master and Slave devices simultaneously? Master and Slave has common clock synthesizer, both are synchronized by SYNCB line therefore I expect in-phase signals on FS and CLKOUT.

But according to page 18 of datasheet (paragraph above Figure 4a): "To verify proper synchronization, the FS signals of the multiple AD9874 devices should be monitored." Does it mean I can use common CLKOUT signal and separate FS signals?

Please clarify if/how I can reduce the number of SSI signals in multiply AD9874s.

 

Best Regards

Igor

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