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problem with enabling cp output

Question asked by *** on Mar 24, 2017
Latest reply on Mar 27, 2017 by JeyasudhaMuthuPerumal

hi,

i am using adv7441a for (625i) video processing.i want to process the component video.i have programmed the registers as per the design document.

 

##CP YPrPb 525i & 625i##
:525i YPrPb In 4X1 16Bit 422 Out through (Encoder in 525i HS & VS Mode):
42 03 0C ; Disable TOD
42 05 00 ; Prim_Mode =000b for SD-M
42 06 0A ; VID_STD=1010b for SD 4x1 525i
42 1D 40 ; Disable TRI_LLC
42 3C A8 ; SOG Sync level for atenuated sync, PLL Qpump to default
42 47 0A ; Enable Automatic PLL_Qpump and VCO Range
42 6B D3 ; Select 422 16 bit YPrPb out from CP.656 enabled.
42 7B 1C ; Disable AV Codes
42 85 19 ; Turn off SSPD and force SOY. For Eval Board.
42 8F 70 ; Turn on LLC_PAD_SEL
42 BA A0 ; Enable HDMI and Analog in
42 F3 07 ; Enable Anti Alias Filters on ADC 0,1,2

when prime mode=000b and VID_STD=1010b,yuv is processed through cp.(as per software manual).

Input
Channel
Pin
No.
ADI Recommended
PRIM_MODE[3:0]
VID_STD[4:0]
SDM_SEL[1:0]
Alternative Control INSEL[3:0] SD only Input
Mapping
SOG75GR-SOG---------
Ain776SCART-BCVBS7SCART1-B
Ain177GR-GCVBS1YC1-YYUV1-YSCART2-CVBS
Ain878SCART-RCVBS8SCART1-R
Ain279GR-BCVBS2YC2-YYUV2-Y
Ain980SCART-GCVBS9SCART1-G
Ain381GR-RCVBS3YC3-YYUV2-U
Ain1093YC-YmanCVBS10

 

Ain494YPbPr-PrCVBS4YC1-CYUV1-USCART2-B
Ain1195CVBSman & auto/Yauto
SCART-CVBS
CVBS11SCART1-CVBS
Ain596YPbPr-PbCVBS5YC2-CYUV1-VSCART2-R
Ain1298YC-Cman & autoNot
available
Ain699YPbPr-YCVBS6YC3-CYUV2-VSCART2-G
SOY97YPbPr-SOY

 

 

as per this table what i understood was,(table2 in hardware mannual) the input pin(ain1,ain4,ain5) or (ain3,ain2,ain6) can be used  for component video(sd) .am i right?.if so  why isn't  the input control (0x00) register not mentioned in the recommended settings in the design document.in my project i have used ain1-y

ain4-pr

ain5-pb.

the cp is always in free run mode.the ttlc clock status in status 2 register is only for progressive video right?...

 

 

thank you

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