By a mistake in our design I supply Vddio with 3.3V whereas Vs is 3.0V. According to the datasheet Vddio<Vs. However during startup it is allowed.
What is the consequence of Vddio> Vs? (leakage?, inaccuracy?, other?)
Thanks for your question and sorry for the late reply. On the functionality standpoint, we don't recommend you to do this as we saw current leakage and malfunction of registers read/write in the lab.
Retrieving data ...