currently we are using AD9361-FMCOMMS3-EBZ to test, firstly we want to verify the DIGIQ interface timing, we want to use PRBS/TONE function of AD9361 for testing RX, and our data clock frequency is 160MHz, LVDS mode, 2T2R, full port mode, and we can measure the DATA_CLK_P/N is 160MHz already after initialize the AD9361 through SPI, but after we config the register 0x3F4 to 0x0b(tone signal) or 0x09(PRBS signal), we can not measure any change for RX_FRAME_P/N, it seems BIST logic not working, is there any other conditions or registers should we config for the AD9361 PRBS BIST test? and the following is AD9361 some key registers value after initializing.
register address: register value
0x010 0xCC rx_frame pulse mode, 2R2T timing
0x012 0x12 LVDS mode, full port
0x013 0x01 FDD mode
0x017 0x1A calibration done, ENSM is in the FDD state
and we keep the Enable and TXNRX pin to low in the test.
How to make the PRBS/Tone logic working?