UMAMAHESWAR84

Re: AD9959 Synchronizing Master and Slave

Discussion created by UMAMAHESWAR84 on Mar 7, 2017
Latest reply on Mar 16, 2017 by UMAMAHESWAR84
Branched from an earlier discussion

Hi Mark,

 

I have one more question regarding AD9959.

 

We are using two AD9959 chips in our design and wanted to control one as master and one slave and sync their clocks. To demonstrate this, I have setup with two AD9959 Eval boards, sync out of master is connected to sync in of slave.

 

I am using Ref clock: 50MHz and multiplier: 8, so system clock is 400MHz and Sync clock is 100MHz. Output frequency is 4MHz to 14MHz.

 

From AD9959 datasheet, I understand in order to synchronize  (using manual software mode synchronization) both the sync clocks we need to load bit FR1[0] or check the box in Multi device sync box and click on load.

 

When both sync clocks are in phase but I don’t see output clocks are in synchronization, I have to go through this process for a while, for example, for 4MHz output frequency I need to go for 20 times in order to synchronize both output and sync clocks of master and slave. This is not feasible in real-time application.

 

For some frequencies, it is harder to synchronize output frequencies as well as sync clocks of master and slave. Is there a better way to synchronize both sync clocks and output frequencies. By the way automatic mode synchronization does not work,  I do not why.

 

I am happy to provide more information on this issue if you need.

 

 

 

 

 

Below is setting of master eval board.

 

 

 

Thanks

Uma

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