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Enabling slow AGC on AD9361

Question asked by stojo on Mar 14, 2017
Latest reply on Mar 15, 2017 by sripad

In order to enable slow AGC, I've set

0x0FA -> 0xE2  // enable

0x101 -> 0x11 // inner high threshold -11dBFS
0x120 -> 0x15 // inner low threshold -15dBFS
0x123 -> 0x11 // Step sizes (inner) 1dB
0x129 -> 0x66 // outer high/low thresholds -5dBFS/-21dBFS
0x12A -> 0x22 // Step sizes (outer) 2dB

 

I've tried many combinations of these settings, but I cannot seem to get AGC to lock in...output power varies linearly as I sweep input power.  Is there register I'm forgetting to set? Is there an example driver I can look at?

 

According to the register map, this should work! (http://www.analog.com/media/cn/technical-documentation/user-guides/AD9364_Register_Map_Reference_Manual_UG-672.pdf )

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