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AD9136 JESD LINK error

Question asked by Chris449 on Mar 14, 2017
Latest reply on Mar 29, 2017 by MicheleV

Hello all,

 

I am working on my own pcb board using AD9136 part:

   - Direct clocking FDAC=983.04MHz (No dac pll used)

   - SYSREF in continuous mode for the time being

 

While designing the pcb, I tried to follow the DAQ2 eval board design. My changes are:

1) SERDOUT3 (DAQ2) became SERDOUT0 (my pcb)

2) SERDOUT0 (DAQ2) became SERDOUT3 (my pcb)

3) Swapped polarity for  SERDOUT1 to SERDOUT3

 

I followed your board design to be able to use your FPGA design (hdl-hdl_2015_r2) with some changes on the  NO-OS software.

 

In order to compensate for the swapped polarity, I applied  0x0E @0x334. After changing the ad9136_init_param to

ad9136_init_param default_ad9136_init_param = {0,3,2,1}; and having the PLL synchronized, I thought that I would have been done but the line test still does not pass, see below:

AD9136 PLL/link ok.
AD9136 dac-0 calibration ok.
AD9136 dac-1 calibration ok.
AD9136 successfully initialized.
JESD204B successfully initialized.
JESD204B-GT-TX[3]: Invalid status, received(0x0FCFC), expected(0x000FF)!
JESD204B-GT-TX[2]: Invalid status, received(0x0FCFC), expected(0x000FF)!
JESD204B-GT-TX[1]: Invalid status, received(0x0FCFC), expected(0x000FF)!
JESD204B-GT-TX[0]: Invalid status, received(0x0FCFC), expected(0x000FF)!

 

Please, could you give me a tips where to focus? Am I missing something in the hardware?

 

Thanks a lot.

 

Best,

 

Chris

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