Hi,

As typical total error of a load cell is about 0.02% of full scale and its repeatability is so, why are we seeking for ADCs with several bits like AD7799? (According to the document "A Reference Design for High-Performance Low-Cost Weigh Scales")

Hi,

Ideally, the 0.02% typical accuracy of a load cell can be met by a 12bit or 14bit ADC. However, this is this is just one of the errors in the complete system and we still have to consider the errors contributed by the analog front end and measurement system such as the ADC itself. For a weigh scale design, specifying the rms noise determines the internal resolution or number of counts that can be obtained from the system. The counts or resolution is equal to Full scale voltage from the load cell divided by peak to peak noise. P-P noise is typically 6.6xrms noise. So let say for example AD7190 was used in this application, with a gain of 128 and at an output data rate of 4.7Hz AD7190 has an rms noise of 8.5nV. So, a load cell with sensitivity of 2mV/V will have 178,250 counts. In terms of bits, this equates to 17.4 bits and with 2kg maximum weight this results with 0.01grams accuracy. This is the performance of the ADC itself without any load cell connected to it. So, if you have connected a load cell the number of resolution could be much lower but still meeting the load cell accuracy requirements. This is the reason why an internal resolution or the actual resolution on the internal analog front end of the system must be much higher than the external resolution so that the design can compensate using the extra resolutions.

Thanks,

Jellenie