I am using the ADV7391 Video DAC in SD slave mode 2 to generate video sync signals. In the modes 525i and 625i there appear sporadic spikes at the end of the line. (Similar to those in the question "ADV7391 glitch at end of line 3 in square pixel mode" from 31.7.2014, but on random lines).
The spikes are appearing randomly, sometimes it is clean for hours, sometimes they are increasing until even the synchronisation may be lost.
Power supply is very clean, data inputs are at constant values, input timing and waveforms of Hsync and Vsync are OK (even Double-Data-Rate for HD is working OK).
Register settings do not change anything, once the spikes are here. (Oversampling PLL On/Off, "Free-running counters"--Reg.86/bit6--, DAC1 only or all DACs enabled, Y only output, ...)
Even when resetting the counters --Reg. 8A/bit7--, the signal is gone, but the spikes continue.
The spikes are no crosstalk from other signals or supply, you can see clearly, that they are digitally generated "clean" signals.
The following pictures show the spikes in different scales, the first one shows, that there is no correlation to the analog supply voltage:
The picture below shows the digital origin of the spikes. They look all nearly equal.
There may be one difference to other applications, which might produce these spikes:
(I suspect this, because they can be seen always at startup, also in HD-mode for some seconds).
The Hsync and Vsync inputs are not generated by a counter directly out of the Pixel clock, but are generated external and synchronized to the pixel clock. (Not independent, but so, that at the first field, they are exactly at the same clockcycle active). Therefore the Pixel-count between two Hsyncs or Vsyncs may vary by two clockcycles. Aditionally the Pixel-frequency may vary up to twenty cycles per second.
Please can you help me to eliminate these spikes.