To sync several AduCM361s together, I need to clock them with the same master clock, which was fed into the micro via ECLK pin:
DioCfgPin(pADI_GP1,PIN0,2); //configures P1.0 as EXT CLK IN
ClkSel(CLK_CD0,CLK_CD0,CLK_CD0,CLK_CD7); // Select CD0 for UART System clock
Every thing seems to run fine until recently, I run into problem
About half the time, after I switch to the external clock, the UART will output at much higher baud rate (about 5 times higher), even after I placed some delay after the switch and re-initialize UART to the desired baud rate
Any pointer at where I should look into this problem?