I have a problem about our wideband products.The HMC833 Output frequency 1G~6G fo/2 Mode Harmonics is too high. but the filter useless at wideband products.
Any good advice?
The fo/2 harmonic will be present on any frequencies above 3000 MHz due to the doubler operation. For frequencies between 1000MHz and 3000MHz there is no fo/2 harmonic since the HMC833 doubler is off. If you need to use this part the wide frequency range requires an adjustable high pass filter to reduce the fo/2 harmonic. Instead of filtering consider the ADF4356. This part operates the VCO in fundamental mode up to 6800 MHz.
I have replaced hmc833 with ADF4356, but there is a new problem, strong ref/pfd spurs as high as -70dBc.
ADF4356 strong spurs
I hope you can help me. Thank you very much.
I have read your problem.
you condition :
f_ref = 140MHz, R_div = 2, f_pfd = 70MHz, Icp = 0.9mA
Wouldb you change the Icp? In my opinion 2.54mA will fit output(above 3G@HMC833).
If you want a single frequency ,Try to change sigma-Delta modulator.
Or change f_ref. ADIsimFrequencyPlanner is a good tool.
I'm using ADF4356...and I have changed the Icp,but it didn't work.
I have try the hmc833_Frac Mode_Fundamental 1566MHz.But 2harmonic 3132MHz apear .
I use the recommende Register File。
REG 0 20 // RESET command.REG 1 2 // Default = 2. This value assigns PLL Chip Enable control to the SPI Reg 1 , 1 enabled, 0 disabled. To assign PLL CE control to CE pin, write Reg 1=1.REG 2 1 // Ref Divider Register-Default value = 1h (Rdiv=1). Program as needed.REG 5 1628 // VCO configuration Register. Program this value.REG 5 60A0 // VCO configuration Register. Program this value.REG 5 E090 // VCO output divider = 1REG 5 2898 // Fundamental Mode (non-doubler) output. For Doubler Mode, write 2018h;REG 5 0 // Close out VCO register programming by writing Reg 5 = 0.REG 6 30F4A // Delta-Sigma Modulator Configuration Register. Program this value for Frac Mode.REG 7 14D // 14Dh is the default value for LD programming. For different configurations, especially higher PFD rates, this may need to change.REG 8 C1BEFF // Default value =C1BEFFh. No need to program.REG 9 5CBFFF // CP Register-Program as needed. 5CBFFFh = 2.54mA CP current with 570uA down CP Offset current.REG A 2046 // VCO Tuning Configuration Register-Program this value.REG B 7C061 // PFD/CP Control Register-Program this value.REG F 81 // Default vaue =1. 81h configures LD/SDO pin to output LD status always, except during SPI reads when the pin is automatically mux'ed to output the serial data.//REG 3 1F // Integer VCO Divider Register-Progarm as needed to set frequency. REG 4 555555 // Fractional VCO Divider Register-Program as needed to set frequency. When this register is written, a VCO auto-cal is initiated.//// These last 3 lines are directives to the eval software indicating ref source freq and divider configuration.// These are not required in actual application software.XTAL 50VCO_TO_SYNTH_DIV 1VCO_TO_OUT_DIV 1
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