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AD9857 controlled by an FPGA

Question asked by creed on Sep 22, 2011
Latest reply on Sep 26, 2011 by creed

After looking at the datasheet and the evaluation oard user guide, I did find something in the engineerzone:


post #10 suggests that I issue a reset first and then toggle on of the PS lines to generate a fud internally on the chip.

the attached waveform diagram shows the timing of the signals I'm sending from the ML605 to the AD9857 EVB.
I issue a reset then send a x01 to the ad8957 via the spi bus followed by x04.  I then toggle PS0 but I do not see a
change in voltage across the dac reset resistor (R5/R6).


Jumper settings on the board are as follows:


W1 and W13 set to PC Disable since I am using the U10 header and not a PC to control the board.
W3  jumper is across pins 1 and 4
W5 jumper is across the bottom two pins
W4  jumpers is across the left 2 pins for DAC current  = 20mA
W12 jumper is across the 2 pins on the right
W2 no jumpers are installed
W11 jumper is across the left and center pins, tied to GND
W7 jumper is across the top 2 pins (store shunt)


I have a 10MHz oscillator on J1 and I am/will be looking for an output on J2 when I try to put the chip in
single tone mode.


Any help would be appreciated.