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ADV7343: not getting SD output on DAC1, DAC2 and DAC3 simultaneously

Question asked by brgl on Mar 3, 2017
Latest reply on Mar 13, 2017 by JeyasudhaMuthuPerumal

We have an ADV7343 video DAC on a LogicPD da850-evm with a UI board expander. We are in the process of bringing linux support for this board's video display upstream but we encountered a problem with the video DAC.

 

On the board we have 16 video signals exposed by the SoC hooked up to S0-S7 & C0-C7 DAC pins, and the signals connected to pins S0-S7 are also split and go to pins Y0-Y7 of the DAC.

 

The video format on the input is in multiplexed mode with both Y and C in the byte stream.

 

The DAC1 signal is hooked up to a composite connector, while DAC2 and DAC3 go to an s-video connector.

 

While the picture is correct on the composite, we get only the luma signal on the s-video connector, which on some displays leads to a black & white picture and on other to no picture at all.

 

Below is the complete configuration of the DAC:

 

register offset: 0x0b value: 0x00
register offset: 0x17 value: 0x02
register offset: 0x30 value: 0x3c
register offset: 0x31 value: 0x01
register offset: 0x32 value: 0x00
register offset: 0x33 value: 0xe8
register offset: 0x34 value: 0x08
register offset: 0x39 value: 0x00
register offset: 0x83 value: 0x10
register offset: 0x84 value: 0x01
register offset: 0x86 value: 0x02
register offset: 0x87 value: 0x0c
register offset: 0x88 value: 0x04
register offset: 0x89 value: 0x00
register offset: 0xa0 value: 0x7f
register offset: 0x99 value: 0x10
register offset: 0xa1 value: 0x03
register offset: 0x00 value: 0x1c
register offset: 0x02 value: 0x20
register offset: 0x82 value: 0xcb
register offset: 0x35 value: 0x00
register offset: 0x01 value: 0x00
register offset: 0x8c value: 0x1e
register offset: 0x8d value: 0x7c
register offset: 0x8e value: 0xf0
register offset: 0x8f value: 0x21
register offset: 0x80 value: 0x00

 

The output configuration is SD only: SD DAC output 2 bit is 0, SD DAC output 1 bit is 1, SD luma/chroma swap bit is 0. This should result in DAC1 being set to CVBS, DAC2 to luma and DAC3 to chroma.

 

The input configuration is 16-bit 4:4:4 YCrCb Mode.

 

What is really strange is that setting bit 4 of register 0x33 (marked as reserved in the manual) enables s-video signals while disabling DAC1. I discovered that accidentally.

 

Could you please advise on the problem?

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