Could you reply some comments and any will be side effects for the registers adjusting?
Customer have some ADV7850 heat question during below condition.
Input Signal: CVBS or S-Video
Input Signal, output eye diagram, screen show and schematics as attachment.
Failure Description: abnormal output show signal show noise
They try to adjust the ADV7850 Reg.s several parameters can be adjusted and improve the problem.
1. IO Map 0x0B.1 (core_pdn) & 0x0C.5 (power_down) can effectively improve the problem.
But occasionally fail below about 1/50 ~1/100 the probability.
2. TX_Main 0x3B[4:3] (PLL pixel repetition) input sources is CVBS or S-Video, Set this to x2(value=01)
2.1 It was okay set the repetition to another mode and return it when recognized video source,
2.2 Measurement of the rear end of the decode TLL signal,
a slight (impetuous point) clock will crush every once in a while.
PS:A. High temperature will make the phenomenon worse
B. Sometimes a high temperature will become normal or work for a period of time will be better.
If the screen is normal, it will not happen again (unless switch source or power ON-OFF)
Could you reply some comments and any there will be side effects for the registers adjusting?