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ADF7023 RS encode and decode

Question asked by UFO on Feb 27, 2017
Latest reply on May 3, 2017 by SteveH

Dear Mr./Ms.:

My project needs to use RS encode and decode. According to ADI AN-1292, I follow the procedure to download rom_ram_7023_2_2_RS_AES.dat to ADF7023. Here is my encode procedure:

 

// step 1

status = 0;
ADF7023_SetRAM_And_Verify(0x002, 1, &status);

 

// step 2

status = 0x10;

ADF7023_SetRAM_And_Verify(0x0D7, 1, &status); // start address of data packet (packet RAM)

 

// step 3

status = 188;

ADF7023_SetRAM_And_Verify(0x0D8, 1, &status); // k

 

// step 4

status = 198;
ADF7023_SetRAM_And_Verify(0x0D9, 1, &status); // n

 

// step 5

ADF7023_SetCommand(CMD_RS_ENCODE_INIT);
while(1)
{
      ADF7023_GetRAM(MCR_REG_INTERRUPT_SOURCE_1, 0x1, &status);
      status = status & BBRAM_INTERRUPT_MASK_1_CMD_FINISHED;
      if (status)
         break;
}
ADF7023_SetRAM(MCR_REG_INTERRUPT_SOURCE_1, 0x1, &status);

 

// step 6

ADF7023_SetCommand(CMD_RS_ENCODE);
while(1)
{
      ADF7023_GetRAM(MCR_REG_INTERRUPT_SOURCE_1, 0x1, &status);
      status = status & BBRAM_INTERRUPT_MASK_1_CMD_FINISHED;
      if (status)
         break;
}
ADF7023_SetRAM(MCR_REG_INTERRUPT_SOURCE_1, 0x1, &status);

 

as refer to page 3 of AN-1292.

It stuck at step 6 due to the readback value of MCR_REG_INTERRUPT_SOURCE_1 always equal to 0x42.

 

1. Did I miss any steps or misunderstand the procedure?

2. What does the step 1 mean? I don't see any description in the datasheet.

3. Do I need to go through all steps for the next packet data to be encoded or just issue command CMD_RS_ENCODE?

4. If I want to do the RS encode and decode on the same chip, do I need to go through all steps for the decode or just issue command CMD_RS_DECODE?

Thank you so much.

 

Yu-Fu Hsieh

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