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DMA on a blackfin bf-561

Question asked by Ryan_Sommer on Feb 24, 2017
Latest reply on Apr 6, 2017 by Jithul_Janardhanan

Hello! I have some difficulties configuring a DMA controller on a blackfin bf-561. I would really appreciate if someone could tell me what I am doing wrong. I am at a very early stage trying to figure out how to work with the DMA. 


What I want to do is to write from the L1 data buffer into the L3 buffer with the DMA2 core bus. The L1 buffer is filled with the same 16 bit value. I want to repeatedly read from the same starting address in the L1 buffer and then add an offset to the destination L3 every time I write into the L3 buffer so that I can fill up the larger L3 buffer with the same few values that I can retrieve from the L1 buffer.


I was thinking that it might be useful to use the DMA2s array flow mode (number 4). So I am trying to create an array of descriptors and get the DMA to fetch them properly. I have printed the CURR_DESCR_PTR and noticed that the fetches aren't working.


this is the code:


short L1_buffer_size = sizeof(short) * 720 * 4;


short *L1_pointer = (short *)malloc(L1_buffer_size);
memset(L1_pointer, 0x8080, L1_buffer_size);

short *L3_out_address = outFrame + PIXEL_PER_LINE * 22 + 142;


typedef struct sMDMA_descriptor {
      volatile short *start_address;
      volatile short *config;
} tMDMA_descriptor;


                                 // array mode    desc size    intterupt en       16 bit transfer
short read_config = 0x4000             | 0x0400       | DI_EN             | 0x0004;
short read_stop = read_config & 0x0fff;

                                 // array mode    desc size    int en          16 bit transfer    write
short write_config = 0x4000             | 0x0400       |   DI_EN    | 0x0004          | WNR;
short write_stop = write_config & 0x0fff;

tMDMA_descriptor descriptor_src_arr[5] = {
{L1_pointer, &read_config},
{L1_pointer, &read_config},
{L1_pointer, &read_config},
{L1_pointer, &read_config},
{L1_pointer, &read_stop}};


tMDMA_descriptor descriptor_dest_arr[5] = {
{L3_out_address, &write_config},
{L3_out_address + PIXEL_PER_LINE * 2 , &write_config},
{L3_out_address + PIXEL_PER_LINE * 3 , &write_config},
{L3_out_address + PIXEL_PER_LINE * 3 , &write_config},
{L3_out_address + PIXEL_PER_LINE * 4 , &write_stop}};


*pMDMA2_S0_X_COUNT = L1_buffer_size/2;
*pMDMA2_S0_X_MODIFY = sizeof(short);
*pMDMA2_S0_CURR_DESC_PTR = descriptor_src_arr;
*pMDMA2_S0_CONFIG = read_config;


*pMDMA2_D0_X_COUNT = L1_buffer_size/2;
*pMDMA2_D0_X_MODIFY = sizeof(short);
*pMDMA2_D0_CURR_DESC_PTR = descriptor_dest_arr;
*pMDMA2_D0_CONFIG = write_config;





I would be very grateful for any advice!! Thank you, Ryan