AnsweredAssumed Answered

HMC659 biasing sequence

Question asked by katsu on Feb 24, 2017
Latest reply on Feb 27, 2017 by katsu



In case that Vgg1 is pre-adjusted and fixed by register divider, is following sequence no problem?


The biasing sequence:
A) Set Vgg1 (Idq adjusted voltage, fixed to somewhere between -2V and 0V)
B) Set Vdd to +8V
C) Set Vgg2 to +3V
Timing: A)<B)=<C)


My customer understands recommended biasing sequence described in, however, from circuit size point of view they would like to apply fixed voltage to Vgg1 by resister divider.


Best Regards,