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HMC3716 PFD in adiSimPLL

Question asked by Des_coghlan on Feb 15, 2017
Latest reply on Feb 24, 2017 by MRichardson

How can I simulate a PLL loop with the HMC3716 phase/freq detector in adiSimPLL? The part is not in the chip library. Alternatively, could I define a custom phase detector? I need only phase noise freq analysis, not loop settling in time domain etc, so a simple phase noise floor will do.

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