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Cell settings of delay block

Question asked by AndyKay on Feb 14, 2017
Latest reply on Feb 16, 2017 by mmmike

I'm booting and controlling an ADAU1452 with an 8bit microcontroller.

 

In sigma studio I try to exclude RAM content of all delay-cells from export (see file "*_04A_IC_1.h") in order to keep the exported data array (  ADI_REG_TYPE Param_Data_IC_1[PARAM_SIZE_IC_1] )  as short as possible to save flash memory in my microcontroller.

 

Is there a possibility to exclude RAM content of delay-cells (a lot of 'unnecessary' ZEROs) from export to data array ( ADI_REG_TYPE Param_Data_IC_1[PARAM_SIZE_IC_1] )?

This would be a great feature!

 

I tried:

- right click on delay-cell -> Cell Settings -> Options -> Advanced -> File Content: Datas "Hirachy + Name (Doesn't Recall)"

---> no success. Does anybody know the effect/sense of this setting?

 

- right click on delay-cell -> exclude from Export Files

---> no success. RAM content (a lot of ZEROs) still contained in "ADI_REG_TYPE Param_Data_IC_1[PARAM_SIZE_IC_1]"

 

Can anybody give me a hint?

 

 

Related delay-memory-question:

ADAU1452 DM0 delay issue 

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