Is it possible to use the AD9889B in DDR mode (InputID=5 or 6) for 1080p-60 (148.5 MHz pixel clock)?
No, it is not possible to clock the AD9889B at 297MHz - that is what would be required for DDR at 148.5MHz.
There may be some misunderstanding on what DDR really is and how it works.
For DDR modes, it is not the clock frequency that is doubled, but the data signals change two times per clock cycle, i.e. on the falling and on the rising edge.
Therefore the clock signal remains at 148.5 MHz IMHO.
My question remains the same: Is it possible to use the AD9889B in DDR mode (InputID=5 or 6) for 1080p-60 (148.5 MHz pixel clock)?
I think the answer stands, however. Even if the clock is not toggling at 297MHz, the buses will be changing data at that rate and this is not supported in the AD9889B.
Retrieving data ...