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Writing COMxIEN Asserts TX Buffer Empty Interrupt?

Question asked by PButler on Sep 16, 2011
Latest reply on Sep 22, 2011 by PatrickN

Using a mIDAS-Link emulator with an ADuC7129, I have found that enabling the transmit buffer empty interrupt by writing 0x02 to COM0IEN causes the COM0STA register to signal the interrupt.  I then have to clear the interrupt by reading  COM0IID.  This process is fine on power-up.

 

However, once I am running I plan to enable and disable this interrupt, and I may be in the middle of transmitting a series of bytes on the uart when I go to re-enable the interrupt. As a result, I can't simply force clear the interrupt source.

 

I don't believe the 8051 based ADuCs have this problem.  Am I missing something in my UART configuration (see below)? Or is this a chip errata that is just not documented?  I used the configuration code below to determine that even re-writing the IEN register after clearing the interrupt causes it to re-assert.

COM0CON0 = 0x80;       // Setting DLAB
COM0DIV0 = 0x04;       // Setting DIV0 to calculated DL
COM0DIV1 = 0x00;       // Setting DIV1 to calculated CD
COM0CON0 = 0x03;       // Clearing DLAB, 8 data bits, 1 stop bit, no parity
COM0DIV2 = 0x8ADA;       // Enable Fractional Baud rate generator, M = 1, N = 730
COM0IEN0 = ETBEI;       // Enable TX Empty interrupt
Temp = COM0IID0;       // clear TX empty interrupt
  COM0IEN0 = ETBEI;       // Enable TX Empty interrupt
Temp = COM0IID0;       // clear TX empty interrupt
COM0IEN0 = ETBEI;       // Enable TX Empty interrupt
Temp = COM0IID0;       // clear TX empty interrupt
COM0IEN0 = ETBEI;       // Enable TX Empty interrupt
Temp = COM0IID0;       // clear TX empty interrupt

 

Any help understanding this undersirable behavior would be appreciated.

Paul

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