I am trying to run an example - which demonstrate generating the RTL and bit stream using the Matlab HDL Coder (Workflow Adviser) tool.
Example is here:
In this example, when we generate bit steram (SDR build) using Mathworks HDL Coder --> Workflow Adviser).
Build fail due to the reason that read as : Failed : Compiling vendor source HDL did not complete successfully.
(Here Vendor mean ADI's HLD support packahe IP: "ADI_hdl_2014_r1"
We have tried it with Vivado 2014.4 and Matlab 2015. (we also have Vivado 16,1)
May be if you can help based on your experience...
Here are some of the screen shot for your ready reference :
ZC706 and FMCOMMS4 (Vivado 14.4) (Matlab 2015b)
Vendor Support Package Folder: and 1 channel for AD 9364 (FMCOMM4)