My customer wants to ask you about the following question on AD9250 reset operation.
Q1: When RST pin (Pin#:10) in AD9250 is asserted with low level as the hardware reset operation, all of the AD9250 functions including “CLOCK GENERATION” are reset. Is it correct?
My customer is concerned about the following situation:
1) After powering-up, some clock signals start being inputted to an AD9250.
2) The clock signals break.
3) The clock signals re-start being inputted to the AD9250.
4) The AD9250 starts data converting from analog data to digital data with the stable clock inputs.
The customer supposed that the broken clock signal might cause any problem in the clock generation functions of AD9250. So, the customer puts the hardware reset operation after the clock signals re-start being inputted to the AD9250. Therefore, the customer is asking us whether or not the hardware reset operation can also reset the clock generation functions of AD9250.
Could you please help my customer to understand the hardware reset operation in AD9250?
Thanks and regards.