Customer is doing customer implementation and below is the query
Is a “AD9371 IP Core” necessary between Xilinx JESD and DSP? Is it required for sample framing/deframing? If so, why? And how does it need to be configured?
Only you can answer that. If you are not sure, the best thing to do is remove it -- if it was necessary you will know.
In general, it is not necessary for a straight forward downstream dsp. You can replace it with just the ad9371_if module that handles the framing/deframing (which is simply some re-arrangement of the bits). Though we do encourage you to freely use our designs, we do not support customization of the design.
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